UM0434 Datasheet, PDF (100/390 Pages) STMicroelectronics – The primary objective of this user’s manual is to describe

UM0434
Register model
Table 89. Special purpose registers (continued)
Mnemonic
Name
SPR
number
Access
Privileged
e200z3
specific
SPRG2 SPR general 2
274
R/W
Yes
No
SPRG3 SPR general 3
SPRG4 SPR general 4
SPRG5 SPR general 5
275
R/W
Yes
No
260
Read only
No
No
276
R/W
Yes
No
261
Read only
No
No
277
R/W
Yes
No
SPRG6 SPR general 6
SPRG7 SPR general 7
262
Read only
No
No
278
R/W
Yes
No
263
Read only
No
No
279
R/W
Yes
No
SRR0
SRR1
SVR
Save/restore register 0
Save/restore register 1
System version register
TBL Time base lower
TBU Time base upper
TCR Timer control register
TLB0CFG TLB0 configuration register
26
R/W
Yes
No
27
R/W
Yes
No
1023
Read only
Yes
Yes
268
Read only
No
No
284
Write only
Yes
No
269
Read only
No
No
285
Write only
Yes
No
340
R/W
Yes
No
688
Read only
Yes
Yes
TLB1CFG TLB1 configuration register
TSR Timer status register
USPRG0 User SPR general 0
XER Integer exception register
689
Read only
Yes
Yes
336
Read/Clear⁽⁴⁾
Yes
No
256
R/W
No
No
1
R/W
No
No
Notes:
1. Only writable when multiple contexts are implemented. Otherwise, writes are ignored
2. The debug status register (DBSR) is read using mfspr. DBSR cannot be directly written. Instead, DBSR bits corresponding
to 1 bits in the GPR can be cleared using mtspr.
3. IVOR9 handles the auxiliary processor unavailable interrupt. This interrupt is defined by the EIS but not supported in the
e200z3; therefore, use of IVOR9 is not supported in the e200z3.
4. TSR is read using mfspr, but it cannot be directly written. Instead, TSR bits corresponding to 1 bits in the GPR can be
cleared using mtspr.
4.18.4
Reset settings
Table 90 shows the state of the PowerPC Book E registers and other optional resources
immediately following a system reset.
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