S6E2HG Datasheet, PDF (83/161 Pages) SPANSION – fpu built-in

S6E2HG Series
12.4 AC Characteristics
12.4.1 Main Clock Input Characteristics
(VCC = 2.7V to 5.5V, VSS = 0V)
Parameter
Value
Symbol Pin Name Conditions
Unit
Min Max
Remarks
Input frequency
fCH
Input clock cycle
Input clock pulse
width
Input clock rising
time and falling time
tCYLH
-
tCF,
tCR
VCC ≥ 4.5 V
4
VCC < 4.5 V
4
48
20
MHz
When crystal oscillator is
connected
VCC ≥ 4.5 V
4
VCC < 4.5 V
4
48
MHz When using external clock
20
X0,
X1
VCC ≥ 4.5 V 20.83 250
VCC < 4.5 V
50
250
ns When using external clock
PWH/tCYLH,
PWL/tCYLH
45
55
% When using external clock
-
-
5
ns When using external clock
fCC
-
Internal operating
fCP0
-
clock*¹ frequency
fCP1
-
fCP2
-
-
-
160 MHz Base clock (HCLK/FCLK)
-
-
80
MHz APB0 bus clock*²
-
-
160
MHz APB1 bus clock*²
-
-
80
MHz APB2 bus clock*²
tCYCC
-
Internal operating
tCYCP0
-
clock*¹ cycle time
tCYCP1
-
tCYCP2
-
-
6.25
-
ns Base clock (HCLK/FCLK)
-
12.5
-
ns APB0 bus clock*²
-
6.25
-
ns APB1 bus clock*²
-
12.5
-
ns APB2 bus clock*²
*1: For more information about each internal operating clock, see Chapter 2-1: Clock in FM4 Family Peripheral Manual Main
part(MN709-00001).
*2: For about each APB bus which each peripheral is connected to, see 8. Block Diagram" in this data sheet.
X0
Document Number: 001-98943 Rev. *A
Page 83 of 161