S6E2HG Datasheet, PDF (135/161 Pages) SPANSION – fpu built-in

S6E2HG Series
12.4.13 Quadrature Position/Revolution Counter Timing
(VCC = 2.7V to 5.5V, VSS = 0V)
Parameter
AIN pin H width
AIN pin L width
BIN pin H width
BIN pin L width
BIN rising time from
AIN pin H level
AIN falling time from
BIN pin H level
BIN falling time from
AIN pin L level
AIN rising time from
BIN pin L level
AIN rising time from
BIN pin H level
BIN falling time from
AIN pin H level
AIN falling time from
BIN pin L level
BIN rising time from
AIN pin L level
ZIN pin H width
ZIN pin L width
AIN/BIN rising and falling time from
determined ZIN level
Determined ZIN level from AIN/BIN
rising and falling time
Symbol
tAHL
tALL
tBHL
tBLL
tAUBU
tBUAD
tADBD
tBDAU
tBUAU
tAUBD
tBDAD
tADBU
tZHL
tZLL
tZABE
tABEZ
Conditions
-
-
-
-
PC_Mode2 or PC_Mode3
PC_Mode2 or PC_Mode3
PC_Mode2 or PC_Mode3
PC_Mode2 or PC_Mode3
PC_Mode2 or PC_Mode3
PC_Mode2 or PC_Mode3
PC_Mode2 or PC_Mode3
PC_Mode2 or PC_Mode3
QCR:CGSC="0"
QCR:CGSC="0"
QCR:CGSC="1"
QCR:CGSC="1"
Value
Min
Max
2tCYCP*
-
Unit
ns
*: tCYCP indicates the APB bus clock cycle time except stop when in Stop mode, in timer mode.
About the APB bus number which Quadrature Position/Revolution Counter is connected to, see 8. Block Diagram in this data
sheet.
tAHL
tALL
AIN
tAUBU
tBUAD
tADBD
tBDAU
BIN
tBHL
tBLL
Document Number: 001-98943 Rev. *A
Page 135 of 161