CP2110 Datasheet, PDF (9/26 Pages) Silicon Laboratories – SINGLE-CHIP HID USB TO UART BRIDGE

CP2110
Table 7. CP2110 Pin Definitions (Continued)
Name
GPIO.4
–GM –GM1
QFN24 QFN28
19* 28*
Type
D I/O
Description
In GPIO mode, this pin is a user-configurable input or output.
TXT
GPIO.5 18* 27*
D Out
D I/O
In TXT mode, this pin is the Transmit Toggle pin and toggles to indicate
UART transmission. The pin is logic high when a transmission is not in
progress.
In GPIO mode, this pin is a user-configurable input or output for the
Standard Comm Interface.
RXT
GPIO.6 15* 19*
D Out
D I/O
In RXT mode, this pin is the Receive Toggle pin. The pin is logic high
when the UART is not receiving data.
This pin is a user-configurable input or output.
GPIO.7 14* 17* D I/O This pin is a user-configurable input or output.
GPIO.8 13* 16* D I/O This pin is a user-configurable input or output.
GPIO.9 12* 10* D I/O This pin is a user-configurable input or output.
SUSPEND 11* 12* D Out This pin is logic high when the CP2110 is in the USB Suspend state.
SUSPEND 17* 11* D Out This pin is logic low when the CP2110 is in the USB Suspend state.
N/C
10* 13, 14,
15, 20,
21, 22*
No connect. This pin should be left unconnected or tied to V_IO.
*Note: Pins can be left unconnected when not used.
Rev. 1.2
9