SI5355 Datasheet, PDF (5/22 Pages) Silicon Laboratories – ANY-FREQUENCY 1–200 MHZ QUAD FREQUENCY 8-OUTPUT CLOCK GENERATOR

Si5355
Table 3. AC Characteristics
(V_DD = 1.8 V –5% to +10%, 2.5 or 3.3 V ±10%, T_A = –40 to 85 °C)
Parameter
Symbol
Test Condition
Input Clock
Clock Input Frequency
Clock Input Rise/Fall Time
Clock Input Duty Cycle
F_IN
T_R/T_F
DC
20–80% V_DD
10–90% V_DD
Input tr/tf within specified
limits shown above
Clock Input Capacitance
C_IN
Output Clocks
Clock Output Frequency
Clock Output Frequency Synthesis
Resolution
F_O
F_RES
See "3.3. Input and Output
Frequency Configuration"
on page 10
Output Load Capacitance
Clock Output Rise/Fall Time
Clock Output Rise/Fall Time
Clock Output Duty Cycle
Powerup Time
Output Enable Time
Reset Minimum Pulse Width
Output-Output Skew
Period Jitter
Cycle-Cycle Jitter*
Phase Jitter
PLL Loop Bandwidth
C_L
T_R/T_F
T_R/T_F
DC
T_PU
T_OEB
T_RESET
T_SKEW
J_PPKPK
J_CCPK
J_PH
F_BW
20 to 80% V_DD,
C_L = 15 pF
20 to 80% V_DD,
C_L = 2 pF
POR to output clock valid
Outputs at same
frequency, f_OUT > 5 MHz
10000 cycles*
10000 cycles*
12 kHz to 20 MHz
Interrupt Status Timing
CLKIN Loss of Signal Assert Time
CLKIN Loss of Signal Deassert
Time
t_LOS
t_{LOS_b}
LOS Rise/Fall Time (20–80%)
T_R/T_F C_L < 10 pF, pullup < 1 k
*Note: Measured in accordance to JEDEC Standard 65.
Min
5
—
—
40
—
1
0
—
—
—
45
—
—
—
–150
—
—
—
—
—
0.01
—
Typ
—
—
—
—
2
—
0
—
—
0.45
50
—
—
—
—
50
40
2
1.6
2.6
0.2
—
Max Units
200 MHz
2.3
ns
4
ns
60
%
—
pF
200 MHz
1
ppb
15
pF
2.0
ns
0.85
ns
55
%
2
ms
10
µs
200
ns
+150
ps
75 ps pk-pk
70
ps pk
— ps rms
—
MHz
5
µs
1
µs
10
ns
Rev. 1.1
5