SI5355 Datasheet, PDF (12/22 Pages) Silicon Laboratories – ANY-FREQUENCY 1–200 MHZ QUAD FREQUENCY 8-OUTPUT CLOCK GENERATOR

Si5355
3.8. CMOS Output Drivers
The Si5355 has 4 banks of outputs with each bank comprised of 2 clocks for a total of 8 CMOS outputs per device.
Each of the output banks can operate from a different VDDO supply (1.8 V, 2.5 V, 3.3 V), simplifying usage in
mixed supply applications. All clock outputs between 1 and 200 MHz are in-phase with minimal output-to-output
skew (see Table 3 on page 5 for specification). When an output bank is disabled using any of the OEB functions,
the clock outputs are stopped low.
The CMOS output driver has a controlled impedance in the range of 42 to 50 which includes an internal 22 
series resistor. An external series resistor is not needed when driving 50  traces. If higher impedance traces are
used then a series resistor may be added. A typical configuration is shown in Figure 5.
Si5355
+1.8V, +2.5V, +3.3V
VDDOA
Bank A
CLK0
MultiSynth
CLK1
50
50
PLL
+1.8V, +2.5V, +3.3V
VDDOB
Bank B
MultiSynth
CLK2
CLK3
50
50
+1.8V, +2.5V, +3.3V
VDDOC
Bank C
CLK4
MultiSynth
CLK5
50
50
+1.8V, +2.5V, +3.3V
VDDOD
Bank D
CLK6
MultiSynth
CLK7
50
50
Figure 5. CMOS Output Driver Configuration
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Rev. 1.1