SI53312 Datasheet, PDF(4/33 Page) Silicon Laboratories – 1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX

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SI53312 Datasheet, PDF (4/33 Pages) Silicon Laboratories – 1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX

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Si53312

Table 3. DC Common Characteristics

(VDD = 1.8 V ï±ï 5%, 2.5 V ï± 5%, or 3.3 V ï±ï 10%,TA = â40 to 85 ï°C)

Parameter

Supply Current

Output Buffer

Supply Current

(Per Clock Output)

@100 MHz

Symbol

IDD

IDDOX

Test Condition

LVPECL (3.3 V)

Low Power LVPECL (3.3 V)

LVDS (3.3 V)

CML (3.3 V)

HCSL, 100 MHz, 2 pF load (3.3 V)

Voltage Reference

Input High Voltage

VREF

VIH

CMOS (1.8 V, SFOUT = Open/0),

per output, CL = 5 pF, 200 MHz

CMOS (2.5 V, SFOUT = Open/0),

per output, CL = 5 pF, 200 MHz

CMOS (3.3 V, SFOUT = 0/1),

per output, CL = 5 pF, 200 MHz

VREF pin

SFOUTx, DIVx, CLK_SEL, OEx

Input Mid Voltage

VIM

SFOUTx, DIVx

3-level input pins

Input Low Voltage

VIL

SFOUTx, DIVx, CLK_SEL, OEx

Internal Pull-down

Resistor

Internal Pull-up

Resistor

RDOWN

RUP

CLK_SEL, DIVx, SFOUTx,

OEx, DIVx, SFOUTx

Min

0.8 x

VDD

0.45 x

VDD

Typ

VDD/2

0.5 x

VDD

Max

100

0.55 x

VDD

0.2 x

VDD

Unit

kâ¦

Table 4. Output Characteristics (LVPECL)

(VDDOX = 2.5 V Â± 5%, or 3.3 V Â± 10%,TA = â40 to 85 Â°C)

Parameter

Symbol Test Condition

Min

Output DC Common Mode

Voltage

VCOM

VDDOX â 1.595

Single-Ended

VSE

0.40

Output Swing

*Note: Unused outputs can be left floating. Do not short unused outputs to ground.

Typ

0.80

Max

Unit

VDDOX â 1.245 V

1.050

Rev. 1.0

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