SI53312 Datasheet, PDF (17/33 Pages) Silicon Laboratories – 1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX

Si53312
DC Coupled LVDS and Low-Power LVPECL Termination
VDDO = 3.3 V or 2.5 V, or 1.8 V (LVDS only)
VDD
Si53312
Q
50
Qn
50
Standard
LVDS
Receiver
100
AC Coupled LVDS and Low-Power LVPECL Termination
VDDO = 3.3 V or 2.5 V or 1.8 V (LVDS only)
Si53312
Q
50
Qn
50
0.1 uF
0.1 uF
VDD
100
Standard
LVDS
Receiver
AC Coupled CML Termination
VDDO _{= 3.3V or 2.5V or 1.8V}
0.1 uF
Si53312
Q
Qn
50
100
50
0.1 uF
VDD
Standard
CML
Receiver
DC Coupled HCSL Receiver Termination
VDDO = 3.3V
Si53312
Q
50
Qn
50
50
50
VDD
Standard
HCSL
Receiver
DC Coupled HCSL Source Termination
VDDO = 3.3V
42.2
Si53312
Q
50
Qn
42.2
50
86.6
86.6
VDD
Standard
HCSL
Receiver
Figure 8. LVDS, CML, HCSL, and Low-Power LVPECL Output Termination
Rev. 1.0
17