SI53119-A03A Datasheet, PDF (28/34 Pages) Silicon Laboratories – PLL or bypass mode

Si53119-A03A
Pin #
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
Table 24. Si53119-A03A 72-Pin QFN Descriptions (Continued)
Name
DIF_3
DIF_3
GND
VDD
DIF_4
DIF_4
DIF_5
DIF_5
VDD_IO
GND
DIF_6
DIF_6
DIF_7
DIF_7
GND
VDD_IO
DIF_8
DIF_8
DIF_9
DIF_9
VDD
GND
DIF_10
DIF_10
DIF_11
DIF_11
GND
VDD_IO
DIF_12
Type
O, DIF
O, DIF
GND
3.3 V
O, DIF
O, DIF
O, DIF
O, DIF
VDD
GND
O, DIF
O, DIF
O, DIF
O, DIF
GND
VDD
O, DIF
O, DIF
O, DIF
O, DIF
3.3 V
GND
O, DIF
O, DIF
O, DIF
O, DIF
GND
VDD
O, DIF
Description
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
Ground for outputs.
3.3 V power supply for outputs.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
Power supply for differential outputs.
Ground for outputs.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
Ground for outputs.
Power supply for differential outputs.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
3.3 V power supply for outputs.
Ground for outputs.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
0.7 V Differential clock outputs. Default is 1:1.
Ground for outputs.
Power supply for differential outputs.
0.7 V Differential clock outputs. Default is 1:1.
28
Rev. 1.0