SI5330 Datasheet, PDF (15/20 Pages) Silicon Laboratories – Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs

Si5330
Table 11. Order Numbers and Device Functionality (Continued)
Part Number^1,2
Input Signal
Format
Output Signal
Format
Number
of
Outputs
Frequency
Range
LVDS Buffers (Single-Ended Input)
Si5330L-A00228-GM
Si5330L-A00229-GM
Si5330L-A00230-GM
Single-Ended
Single-Ended
Single-Ended
3.3 V LVDS
2.5 V LVDS
1.8 V LVDS
4
5 to 350 MHz
4
5 to 350 MHz
4
5 to 350 MHz
HCSL Buffers (Single-Ended Input)
Si5330M-A00231-GM
Si5330M-A00232-GM
Si5330M-A00233-GM
Single-Ended
Single-Ended
Single-Ended
3.3 V HCSL
2.5 V HCSL
1.8 V HCSL
4
5 to 250 MHz
4
5 to 250 MHz
4
5 to 250 MHz
Notes:
1. Custom configurations with mixed output types are also available. Please contact the factory for ordering details.
2. Add an “R” to the part number to specify tape and reel shipment media. When specifying non-tape-and-reel shipment
media, contact your sales representative for more information.
Rev. 1.0
15