SI5330 Datasheet, PDF (11/20 Pages) Silicon Laboratories – Supports single-ended or differential input clock singnals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs

Si5330
Pin #
7
8
9
10
11
12
13
Pin Name
VDD
LOS
CLK3B
CLK3A
VDDO3
RSVD_GND
CLK2B
Table 10. Si5330 Pin Descriptions (Continued)
I/O
VDD
O
O
O
VDD
O
Signal Type
Supply
Open Drain
Multi
Multi
Supply
Multi
Description
Core Supply Voltage.
The device operates from a 1.8, 2.5, or 3.3 V supply. A
0.1 µF bypass capacitor should be located very close to
this pin.
Loss of Signal Indicator.
0 = CLKIN present.
1 = Loss of signal (LOS).
This pin requires an external 1 kpull-up resistor.
Si5330A/B/C/K/L/M Differential Output Devices.
This is the negative side of the differential CLK3 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Output Devices.
This is one of the single-ended CLK3 outputs. Both
CLK3A and CLK3B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
Si5330A/B/C/K/L/M Differential Devices.
This is the positive side of the differential CLK3 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Devices.
This is one of the single-ended CLK3 outputs. Both
CLK3A and CLK3B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
Output Clock Supply Voltage.
Supply voltage for CLK3A/B. Use a 0.1 µF bypass cap
as close as possible to this pin. If CLK3 is not used, this
pin must be tied to V_DD (pin 7 and/or pin 24).
Ground.
Must be connected to system ground.
Si5330A/B/C/K/L/M Differential Output Devices.
This is the negative side of the differential CLK2 output.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not in use.
Si5330F/G/H/J Single-Ended Output Devices.
This is one of the single-ended CLK2 outputs. Both
CLK2A and CLK2B single-ended outputs are in phase.
Refer to AN408 for interfacing and termination details.
Leave unconnected when not is use.
Rev. 1.0
11