SI53313 Datasheet, PDF (11/33 Pages) Silicon Laboratories – DUAL 1:5 LOW-JITTER, ANY-FORMAT BUFFER/LEVEL TRANSLATOR

Si53313
2. Functional Description
The Si53313 is a low-jitter, low-skew dual 1:5 differential output buffer with an independent input for each bank.
The device has an any-format input that accepts most common differential or LVCMOS input signals. Each output
bank features control pins to select signal format, output enable, output divider setting and LVCMOS drive strength.
2.1. Universal, Any-Format Input
The Si53313 has a universal input stage that enables simple interfacing to a wide variety of clock formats, including
LVPECL, LVCMOS, LVDS, HCSL, and CML. Tables 15 and 16 summarize the various input ac- and dc-coupling
options supported by the device. Figures 3, 4, and 5 show the recommended input clock termination options.
Table 15. LVPECL, LVCMOS, and LVDS
1.8 V
2.5/3.3 V
LVPECL
AC-Couple DC-Couple
N/A
N/A
Yes
Yes
LVCMOS
AC-Couple DC-Couple
No
No
No
Yes
LVDS
AC-Couple DC-Couple
Yes
No
Yes
Yes
1.8 V
2.5/3.3 V
Table 16. HCSL and CML
HCSL
AC-Couple DC-Couple
CML
AC-Couple DC-Couple
No
No
Yes
No
Yes
Yes
Yes
No
0.1 µF
CLKx
Si53313
100 
CLKx
0.1 µF
Figure 3. Differential LVPECL, LVDS, CML AC-Coupled Input Termination
VDDO _{= 3. 3 V or2. 5 V}
CMOS
Driver
Rs
VDD
1 k
V_DD
Si53313
Si53312
CLKx
50
CLKx
V_TERM = V_DD/2
1 k
VREF
Figure 4. LVCMOS DC-Coupled Input Termination
Rev. 1.0
11