S-1701 Datasheet, PDF (46/70 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR WITH RESET FUNCTION

HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR WITH RESET FUNCTION
S-1701 Series
Rev.2.4_00
*1. In S-1701 series, when connecting the resistance R_IN between an input power supply pin and a V_IN pin, and
defining the current which flows into R_IN as I_IN, V_IN pin voltage falls by ∆V_IN = I_IN×R_IN at the time of overload,
and changes by ∆V_IN = I_IN×R_IN at the time of load change. Thereby, keep in mind that phenomena, such as
output voltage falls and an output oscillation, occur.
*2. If the input voltage or load current changes transiently, an undershoot or overshoot occurs in the output
voltage of the regulator. In the product types in which the output voltage of the regulator is detected by the
detector, if the output voltage is the detection voltage or lower due to the undershoot, the detector operates
and a reset signal may be output. To prevent this, set the value of the input-and-output capacitor of a
regulator so that the undershoot is the minimum value or set a voltage range that allows the difference
between the output voltage and detection voltage to be equal to or greater than the undershoot.
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Seiko Instruments Inc.