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S-1701 Datasheet, PDF (33/70 Pages) Seiko Instruments Inc – HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR WITH RESET FUNCTION | |||
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HIGH RIPPLE-REJECTION LOW DROPOUT CMOS VOLTAGE REGULATOR WITH RESET FUNCTION
Rev.2.4_00
S-1701 Series
 Standard Circuit
1. S-1701 Series A/ B/ C/ D/ E/ F/ G/ H/ J/ K/ L/ M types
Input
CIN*1
VIN VDOUT
ON/OFF VOUT
VSS
VD output
VR output
CL*2
Single GND
GND
*1. CIN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 1.0 µF or more can be used for CL.
Figure 26
2. S-1701 Series N/ P/ Q/ R/ S/ T/ U/ V/ W/ X/ Y/ Z types
Input
CIN*1
VIN VDOUT
(SENSE) *3 VOUT
VSS
VD output
VR output
CL*2
Single GND
GND
*1. CIN is a capacitor for stabilizing the input.
*2. A ceramic capacitor of 1.0 µF or more can be used for CL.
*3. U/ V/ W/ X/ Y/ Z types of S-1701 series are no connection.
Figure 27
Caution The above connection diagrams and constants will not guarantee successful operation.
Perform thorough evaluation using the actual application to set the constants.
 Application Conditions
Input capacitor (CIN):
Output capacitor (CL):
ESR of output capacitor:
1.0 µF or more
1.0 µF or more
10 ⦠or less
Caution A general series regulator may oscillate, depending on the external components selected.
Check that no oscillation occurs in an application that uses the above capacitor.
Seiko Instruments Inc.
33
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