C501_1 Datasheet, PDF (80/121 Pages) Siemens Semiconductor Group – 8-Bit Single-Chip Microcontroller

Interrupt System
C501
7.1 Interrupt Registers
7.1.1 Interrupt Enable Register
Each interrupt vector can be individually enabled or disabled by setting or clearing the
corresponding bit in the interrupt enable register IE (interrupt enable) or T2CON. This register also
contains the global disable bit (EA), which can be cleared to disable all interrupts at once. Generally,
after reset all interrupt enable bits are set to 0. That means that the corresponding interrupts are
disabled.
Special Function Register IE (Address A8H)
Reset Value : 0X000000B
Bit No.
A8H
MSB
AF_H
EA
AE_H AD_H
– ET2
AC_H
AB_H AA_H
LSB
A9_H A8_H
ES ET1 EX1 ET0 EX0 IE
The shaded bit is not used for interrupt control.
Bit
Function
EA
Enable/disable all interrupts.
If EAL=0, no interrupt will be acknowledged.
If EAL=1, each interrupt source is individually enabled or disabled by setting or
clearing its enable bit.
–
Not implemented. Reserved for future use.
ET2
Timer 2 overflow / external reload interrupt enable.
If ET2 = 0, the timer 2 interrupt is disabled.
If ET2 = 1, the timer 2 interrupt is enabled.
ES
Serial channel (USART) interrupt enable
If ES = 0, the serial channel interrupt 0 is disabled.
If ES = 1, the serial channel interrupt 0 is enabled.
ET1
Timer 1 overflow interrupt enable.
If ET1 = 0, the timer 1 interrupt is disabled.
If ET1 = 1, the timer 1 interrupt is enabled.
EX1
External interrupt 1 enable.
If EX1 = 0, the external interrupt 1 is disabled.
If EX1 = 1, the external interrupt 1 is enabled.
ET0
Timer 0 overflow interrupt enable.
If ET0 = 0, the timer 0 interrupt is disabled.
If ET0 = 1, the timer 0 interrupt is enabled.
EX0
External interrupt 0 enable.
If EX0 = 0, the external interrupt 0 is disabled.
If EX0 = 1, the external interrupt 0 is disabled.
Semiconductor Group
7-2