GS2962 Datasheet, PDF (8/82 Pages) Gennum Corporation – Integrated Narrow-Bandwidth PLL

1.2 Pin Descriptions
Table 1-1: Pin Descriptions
Pin
Number
A1, A2, B1,
B2, B3, C1,
C2, C3, D1,
D2
Name
DIN[19:10]
Timing
A3
F/DE
Synch-
ronous
with
PCLK
Type
Input
Input
Description
PARALLEL DATA BUS
Signal levels are LVCMOS / LVTTL compatible.
20-bit mode
20BIT/10BIT = HIGH
Data Stream 1/Luma data input in
SMPTE mode (SMPTE_BYPASS = HIGH)
Data input in data through mode
(SMPTE_BYPASS = LOW)
10-bit mode
20BIT/10BIT = LOW
Multiplexed Data Stream 1/Luma and
Data Stream 2/Chroma data input in
SMPTE mode
(SMPTE_BYPASS = HIGH)
Data input in data through mode
(SMPTE_BYPASS = LOW)
DVB-ASI data input in DVB-ASI mode
(SMPTE_BYPASS = LOW)
(DVB_ASI = HIGH)
PARALLEL DATA TIMING.
Signal levels are LVCMOS / LVTTL compatible.
TIM_861 = LOW:
Used to indicate the ODD / EVEN field of the video signal when
DETECT_TRS is set LOW. The device will set the F bit in all outgoing
TRS signals for the entire period that the F input signal is HIGH
(IOPROC_EN/DIS must also be HIGH).
The F signal should be set HIGH for the entire period of field 2 and
should be set LOW for all lines in field 1 and for all lines in
progressive scan systems.
The F signal is ignored when DETECT_TRS = HIGH.
TIM_861 = HIGH:
The DE signal is used to indicate the active video period when
DETECT_TRS is set LOW. DE is HIGH for active data and LOW for
blanking. See Section 4.3 and Section 4.3.2 for timing details.
The DE signal is ignored when DETECT_TRS = HIGH.
GS2962 3G/HD/SD-SDI Serializer with Complete
SMPTE Video Support
Data Sheet
48005 - 7
October 2010
8 of 82