GS2962 Datasheet, PDF (55/82 Pages) Gennum Corporation – Integrated Narrow-Bandwidth PLL

Insertion of SMPTE 352M packets into each data stream is controlled by the status
format describing bit, SDTI_TDM_DS1 and SDTI_TDM_DS2 for Data Stream One and
Data Stream Two. If SDTI_TDM_DS1 (default LOW) is set HIGH by the user, the GS2962
does not insert SMPTE 352M packets into Data Stream One. Similarly, SMPTE 352M
packets are inserted in Data Stream Two only if SDTI_TDM_DS2 is set LOW. This allows
the user to individually disable SMPTE 352M packets where the data stream is carrying
an HD-SDTI or TDM signal, which must not have SMPTE 352M packets embedded.
NOTE: The user must ensure that there is sufficient space in the horizontal blanking
interval for the insertion of the SMPTE 352M packets. If the FIRST_AVAIL_POSITION bit
in the host interface registers is set HIGH (by default), the SMPTE 352M packets are
inserted in the first available position following any existing ancillary data. If the
FIRST_AVAIL_POSITION CSR bit is set LOW, then the packets are inserted immediately
after the EAV/CRC1.
If there are pre-existing 352M packets, they will be overwritten if the
FIRST_AVAIL_POSITION CSR bit is HIGH. If the FIRST_AVAIL_POSITION CSR bit is
LOW, the pre-existing 352M packet will be overwritten only if it is contiguous to the
EAV/CRC1 sequence.
4.8.9 Line Based CRC Generation and Insertion (HD/3G)
When operating in HD mode (RATE_SEL0 pin = LOW, RATE_SEL1 pin = LOW), the
GS2962 generates and inserts line based CRC words into both the Y and C channels of
the data stream.
When operating in 3G (RATE_SEL0 pin = LOW, RATE_SEL1 pin = HIGH) Level A mode,
the GS2962 generates and inserts line based CRC words into both Data Stream One and
Data Stream Two.
When operating in 3G (RATE_SEL0 pin = LOW, RATE_SEL1 pin = HIGH) Level B mode,
the GS2962 generates and inserts line based CRC words into both Y and C channels of
both Link A and Link B.
The line based CRC insertion only takes place if the IOPROC_EN/DIS pin is HIGH and
SMPTE_BYPASS is HIGH.
In addition to this, the GS2962 requires the CRC_INS bit to be set LOW in the IOPROC
register.
4.8.10 EDH Generation and Insertion
When operating in SD mode, the GS2962 generates and inserts EDH packets into the
data stream.
The EDH packet generation and insertion only takes place if the IOPROC_EN/DIS pin is
HIGH, SMPTE_BYPASS pin is HIGH, the RATE_SEL0 pin is HIGH and the EDH_CRC_INS
bit is set LOW in the IOPROC register.
Calculation of both Full Field (FF) and Active Picture (AP) CRCs is carried out by the
device.
GS2962 3G/HD/SD-SDI Serializer with Complete
SMPTE Video Support
Data Sheet
48005 - 7
October 2010
55 of 82