GS2962 Datasheet, PDF (12/82 Pages) Gennum Corporation – Integrated Narrow-Bandwidth PLL

Table 1-1: Pin Descriptions (Continued)
Pin
Number
F8
F10
G1, H10
G2, H9
G3
G4
G5
G6
Name
Timing
Type
Description
TDO
RSET
IO_VDD
IO_GND
TIM_861
20bit/10bit
DVB_ASI
SMPTE_BYPASS
Output
COMMUNICATION SIGNAL OUTPUT.
Signal levels are LVCMOS/LVTTL compatible.
Dedicated JTAG pin.
JTAG Test Data Output.
This pin is used to shift results from the device when the JTAG/HOST
pin is LOW.
Input
An external 1% resistor connected to this input is used to set the
SDO/SDO output signal amplitude.
Input Power Power connection for digital I/O. Connect to 3.3V or 1.8V DC digital.
Input Power Ground connection for digital I/O. Connect to digital GND.
Input
CONTROL SIGNAL INPUT.
Signal levels are LVCMOS / LVTTL compatible.
Used to select external CEA-861 timing mode.
When DETECT_TRS is LOW and TIM-861 is LOW, the device extracts
all internal timing from the supplied H:V:F timing signals.
When DETECT_TRS is LOW and TIM-861 is HIGH, the device extracts
all internal timing from the supplied HSYNC, VSYNC, DE timing
signals.
When DETECT_TRS is HIGH, the device extracts all internal timing
from TRS signals embedded in the supplied video stream.
Input
CONTROL SIGNAL INPUT.
Signal levels are LVCMOS/LVTTL compatible.
Used to select the input bus width.
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to enable/disable the DVB-ASI data transmission.
When DVB_ASI is set HIGH and SMPTE_BYPASS is set LOW, then the
device will carry out DVB-ASI word alignment, I/O processing and
transmission.
When SMPTE_BYPASS and DVB_ASI are both set LOW, the device
operates in data-through mode.
Input
CONTROL SIGNAL INPUT.
Signal levels are LVCMOS/LVTTL compatible.
Used to enable / disable all forms of encoding / decoding,
scrambling and EDH insertion.
When set LOW, the device operates in data through mode
(DVB_ASI= LOW), or in DVB-ASI mode (DVB_ASI = HIGH).
No SMPTE scrambling takes place and none of the I/O processing
features of the device are available when SMPTE_BYPASS is set
LOW.
When set HIGH, the device carries out SMPTE scrambling and I/O
processing.
GS2962 3G/HD/SD-SDI Serializer with Complete
SMPTE Video Support
Data Sheet
48005 - 7
October 2010
12 of 82