GS2962 Datasheet, PDF (53/82 Pages) Gennum Corporation – Integrated Narrow-Bandwidth PLL

In SD mode, SAV and EAV code words already embedded in the input video stream will
be protected and will not be blanked.
In HD and 3G modes, SAV and EAV code words, line numbers and line based CRC's
already embedded in the input video stream will be protected and will not be blanked.
The above two statements are really implementation specific, and are provided only to
ensure that the “Detect TRS” function for timing generation is supported by the device,
even when the blanking function is enabled.
From a system perspective, use of the input blanking function is not recommended
unless TRS, line number and CRC generation and insertion functions are enabled.
The active image area will not be blanked.
The input blanking function will not blank any of the ancillary data, TRS words, line
numbers, CRC's, EDH or SMPTE 352M payload identifiers inserted by the device itself.
4.8.4 ANC Data Checksum Calculation and Insertion
The GS2962 calculates checksums for all detected ancillary data packets presented to
the device.
ANC data checksum insertion only takes place if the IOPROC_EN/DIS pin is HIGH, the
SMPTE_BYPASS is HIGH and the ANC_CSUM_INS bit is set LOW in the IOPROC register.
NOTE: The device will correct any CSUM value outside the protected ranges from 000h
to 003h and from 3FCh to 3FFh. If a CSUM value in either of these ranges is presented to
the device, it will not be corrected.
4.8.5 TRS Generation and Insertion
The GS2962 is capable of generating and inserting TRS codes.
TRS word generation and insertion are performed in accordance with the timing
parameters generated by the timing circuits, which is locked to the externally provided
H:V:F or CEA-861 signals, or the TRS signals embedded in the input data stream. The
GS2962 will overwrite the TRS signals if they're already embedded. When a 3G Level A
signal is applied to the GS2962, and when the CONV_372 (bit 9 address 000h) is set LOW
(Level A to Level B conversion), TRS will be inserted according to 3G Level B format.
10-bit TRS code words are inserted at all times.
The insertion of TRS ID words only take place if the IOPROC_EN/DIS pin is HIGH and the
SMPTE_BYPASS pin is HIGH.
In addition to this, the GS2962 requires the TRS_INS bit to be set LOW in the IOPROC
register.
If the TIM_861 pin is HIGH, then the timing circuits are locked to CEA-861 timing.
GS2962 3G/HD/SD-SDI Serializer with Complete
SMPTE Video Support
Data Sheet
48005 - 7
October 2010
53 of 82