GS2962 Datasheet, PDF (31/82 Pages) Gennum Corporation – Integrated Narrow-Bandwidth PLL

4.3 SMPTE Mode
The function of this block is to carry out data scrambling according to SMPTE
424M/SMPTE 292M, and to carry out NRZ to NRZI encoding prior to presentation to the
parallel to serial converter.
These functions are only enabled when the SMPTE_BYPASS pin is HIGH.
In addition, the GS2962 requires the DVB_ASI pin to be set LOW to enable this feature.
4.3.1 H:V:F Timing
In SMPTE mode, the GS2962 can automatically detect the video standard and generate
all internal timing signals. The total line length, active line length, total number of lines
per field/frame and total active lines per field/frame are calculated for the received
parallel video.
When DETECT_TRS is LOW, the video standard and timing signals are based on the
externally supplied H_Blanking, V_Blanking, and F_Digital signals. These signals are
supplied by the H/HSYNC, V/VSYNC and F/DE pins respectively. When DETECT_TRS is
HIGH, the video standard timing signals will be extracted from the embedded TRS ID
words in the parallel input data. Both 8-bit and 10-bit TRS code words will be identified
by the device.
NOTE: I/O processing must be enabled for the device to remap 8-bit TRS words to the
corresponding 10-bit value for transmission.
The GS2962 determines the video standard by timing the horizontal and vertical
reference information supplied at the H/HSYNC, V/VSYNC, and F/DE input pins, or
contained in the TRS ID words of the received video data. Therefore, full
synchronization to the received video standard requires at least one complete video
frame.
Once synchronization has been achieved, the GS2962 will continue to monitor the
received TRS timing or the supplied H, V, and F timing information to maintain
synchronization. The GS2962 will lose all timing information immediately following loss
of H, V and F.
The H signal timing should also be configured via the H_CONFIG bit of the internal
IOPROC register as either active line based blanking or TRS based blanking.
Active line based blanking is enabled when the H_CONFIG bit is set LOW. In this mode,
the H input should be HIGH for the entire horizontal blanking period, including the EAV
and SAV TRS words. This is the default H timing used by the device.
The timing of these signals is shown in Figure 4-5, Table 4-3, Table 4-4, Table 4-5,
Table 4-6, Table 4-7 and Table 4-8.
GS2962 3G/HD/SD-SDI Serializer with Complete
SMPTE Video Support
Data Sheet
48005 - 7
October 2010
31 of 82