K4T1G164QE-HCE7000 Datasheet, PDF (44/46 Pages) Samsung semiconductor – 1Gb E-die DDR2 SDRAM 60FBGA/84FBGA with Lead-Free & Halogen-Free (RoHS compliant)

K4T1G044QE
K4T1G084QE
K4T1G164QE
datasheet
Rev. 1.12
DDR2 SDRAM
Definitions :
- tCK(avg)
tCK(avg) is calculated as the average clock period across any consecutive 200 cycle window.
N
∑ ^{tCK(avg) =}
tCK_j ^/N
j=1
where
N = 200
- tCH(avg) and tCL(avg)
tCH(avg) is defined as the average HIGH pulse width, as calculated across any consecutive 200 HIGH pulses.
tCH(avg) =
where
N
∑ ^tCHj ^{/(N x tCK(avg))}
j=1
N = 200
tCL(avg) is defined as the average LOW pulse width, as calculated across any consecutive 200 LOW pulses.
tCL(avg) =
where
N
∑ ^tCLj ^{/(N x tCK(avg))}
j=1
N = 200
- tJIT(duty)
tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of any single tCH from tCH(avg). tCL jitter is the
largest deviation of any single tCL from tCL(avg).
tJIT(duty) = Min/max of {tJIT(CH), tJIT(CL)}
where,
tJIT(CH) = {tCHi- tCH(avg) where i=1 to 200}
tJIT(CL) = {tCLi- tCL(avg) where i=1 to 200}
- tJIT(per), tJIT(per,lck)
tJIT(per) is defined as the largest deviation of any single tCK from tCK(avg).
tJIT(per) = Min/max of {tCKi- tCK(avg) where i=1 to 200}
tJIT(per) defines the single period jitter when the DLL is already locked.
tJIT(per,lck) uses the same definition for single period jitter, during the DLL locking period only.
tJIT(per) and tJIT(per,lck) are not guaranteed through final production testing.
- tJIT(cc), tJIT(cc,lck)
tJIT(cc) is defined as the difference in clock period between two consecutive clock cycles : tJIT(cc) = Max of |tCK_i+1 - tCKi|
tJIT(cc) defines the cycle to cycle jitter when the DLL is already locked.
tJIT(cc,lck) uses the same definition for cycle to cycle jitter, during the DLL locking period only.
tJIT(cc) and tJIT(cc,lck) are not guaranteed through final production testing.
- tERR(2per), tERR (3per), tERR (4per), tERR (5per), tERR (6-10per) and tERR (11-50per)
tERR is defined as the cumulative error across multiple consecutive cycles from tCK(avg).
i+n-1
tERR(nper) =
∑ ^tCKj
j=1
- n x tCK(avg)
where
n=2
for tERR(2per)
n=3
for tERR(3per)
n=4
for tERR(4per)
n=5
for tERR(5per)
6 ≤ n ≤ 10 for tERR(6-10per)
11 ≤ n ≤ 50 for tERR(11-50per)
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