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| K4T1G164QE-HCE7000 Datasheet, PDF (34/46 Pages) Samsung semiconductor – 1Gb E-die DDR2 SDRAM 60FBGA/84FBGA with Lead-Free & Halogen-Free (RoHS compliant) | |||
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K4T1G044QE
K4T1G084QE
K4T1G164QE
datasheet
Rev. 1.12
DDR2 SDRAM
VDDQ
DQS
Note1
VIH(AC)min
VIH(DC)min
VREF(DC)
VIL(DC)max
VIL(AC)max
VSS
VDDQ
tDS tDH
VIH(AC)min
VIH(DC)min
VREF(DC)
VIL(DC)max
dc to VREF
region
dc to VREF
region
tangent
line
VIL(AC)max
tDS tDH
nominal
line
tangent
line
nominal
line
VSS
HRoisldinSgleSwignRaalte=
âTR
tangent line [ VREF(DC) - VIL(DC)max ]
âTR
HFoalldlinSgleSwigRnaalte=
âTF
tangent line [ VIH(DC)min - VREF(DC) ]
âTF
NOTE : DQS signal must be monotonic between VIL(DC)max and VIH(DC)min.
Figure 14. IIIustration of tangent line for tDH (single-ended DQS)
- 34 -
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