DS_S5T8702 Datasheet, PDF (42/62 Pages) Samsung semiconductor – FEEX ALPHANUMERIC DECODER II

S5T8702
FEEX^TM ALPHANUMERIC DECODER II
c:
SMU:
LBU:
MT:
EOF:
EA:
BOE:
x:
Current system cycle number. This value is updated every frame regardless of whether the
S5T8702 needs to decode the frame. This value will change to its proper value for a frame at the
end of block 0 of the frame. The value of these bits is not guaranteed when FIV is 0.
Synchronous Mode Update. Set if the SM bit has been updated in this packet. When the S5T8702
is turned on, this bit will be set when the first synchronization words are found (SM changes to 1) or
when the first synchronization search window after the S5T8702 is turned on expires (SM stays 0).
The latter condition gives the host the option of assuming the paging device is in range when it is
turned on, and displaying out-of-range only after the initial A search window expires. After the initial
synchronous mode update, the SMU bit will be set whenever the S5T8702 transitions from/to
synchronous mode. Cleared when read. Changes in the SM bit due to turning off the S5T8702 will
not cause the SMU bit to be set. This bit is initialized to 0 when the S5T8702 is reset.
Low Battery Update. Set if the value on two consecutive reads of the LOBAT pin yielded different
results. Cleared when read. The host controls when the LOBAT pin is read via the Receiver Control
Packets. Changes in the LB bit due to turning on the S5T8702 will not cause the LBU bit to be set.
This bit is initialized to 0 when the S5T8702 is reset.
Minute Time-out. Set if one minute has elapsed. Cleared when read. This bit is initialized to 0 when
the S5T8702 is reset.
End Of Frame. Set when the S5T8702 is in all frames mode and the end of frame has been
reached. The S5T8702 is in all frames mode if the all frames mode enable counter is non-zero, if
any temporary address enabled counter is non-zero, or if the FAF bit in the All Frame Mode Packet
is set. Cleared when read. This bit is initialized to 0 when the S5T8702 is reset.
End of Addresses. If EAE of the control packet is set and an address is detected in a frame, EA will
be set after the S5T8702 processes the last address in the frame. Since data packets take priority
over the status packet, the status packet with the EA bit set is guaranteed to come after all address
packets for the frame. Cleared when read. This bit is initialized to 0 when the S5T8702 is reset.
Buffer Overflow Error. Set when information has been lost due to slow host response time. When
the data packet FIFO transmit buffer on the S5T8702 overflows, the S5T8702 clears the transmit
buffer, turns off decoding by clearing the ON bit in the Control Packet, and sets this bit. Cleared
when read. This bit is initialized to 0 when the S5T8702 is reset.
Unused bits. The value of these bits is not guaranteed.
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