DS_K9K1208U0A Datasheet, PDF (21/27 Pages) Samsung semiconductor – 64M x 8 Bit NAND Flash Memory

K9K1208U0A-YCB0, K9K1208U0A-YIB0
Figure 4. Read2 Operation
CLE
CE
WE
ALE
R/B
tR
RE
I/O0~7
50h
Start Add.(4Cycle)
A0 ~ A3 & A9 ~ A25
(A4 ~ A7 :
Don′t Care)
1st half array
2nd half array
FLASH MEMORY
Data Output(Sequential)
Spare Field
Data Field
Figure 5. Sequential Row Read1 Operation
Spare Field
tR
tR
tR
R/B
I/O0 ~ 7
00h
01h
Start Add.(4Cycle)
A0 ~ A7 & A9 ~ A25
(00h Command)
1st half array
2nd half array
Data Output
1st
1st
2nd Block
Nth
Data Output
2nd
(528 Byte)
(01h Command)
1st half array
2nd half array
Data Output
Nth
(528 Byte)
1st
2nd
Nth
Data Field
Spare Field
Data Field
Spare Field
The Sequential Read 1 and 2 operation is allowed only within a block and after the last page of a block is read-
out, the sequential read operation must be terminated by bringing CE high. When the page address moves onto
the next block, read command and address must be given.
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