K1S321615M Datasheet, PDF (12/12 Pages) Samsung semiconductor – 2Mx16 bit Uni-Transistor Random Access Memory

Figure 3.
CS
WE
TNAL0001
UtRAM USAGE AND TIMING
toggle CS to high every 4us
Over 4us
tRC
Address
Write operation have similar restricted operation with Read. If
your system have a timing which sustain invalid states over 4us
at write mode and system have continuous write signal with Min.
tWC over 4us like Figure 4.
You must put read timing on the cycle(Figure 5) or toggle the
CS to high about t’RC(’Figure 6).
Figure 4.
CS
WE
Over 4us
tWP
Address
tWC
Figure 5.
CS
WE
Over 4us
tWP
toggle WE to high and stay high at least tRC every 4us
Address
tWC
Figure 6.
CS
WE
Over 4us
tWP
tRC
toggle CS to high every 4us
tRC
Address
SRAM/NVM PLANNING
YOON-000831
tWC
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