BU9414FV Datasheet, PDF (52/61 Pages) Rohm – 32bit Audio DSP

BU9414FV
Technical Note
11-3. When the frequency more than a stop or the specification range does not enter [ MCLK ] at the time of a sampling rate
change
When switching a sampling rate, the clock of the frequency more than the specification range does not go into MCLK,
but when input data is 0, it can return with the following procedures.
1. Carry out the mute of the DAC (MUTEX_SP and MUTEX_DAC are set to L and it is a mute about BD5446.)
↓
○When the input of MCLK has stopped, please do not input a command until MCLK is inputted again.
Please perform the following setup, after MCLK is inputted on the frequency of specification within the limits.
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2. It is 10ms or more WAIT because of PLL stability.
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○When the section where MCLK stopped or the relation with I2S input had collapsed in the midst of the midst of soft
transition and transmission of a coefficient exists, the coefficient may not be able to be transmitted well. When soft
transition and a coefficient are transmitting, please perform a setup from 11-2 4.
Please perform the following setup, when you are not the midst of soft transition or transmission of a coefficient.
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3. &hAA[7:0] = 80h ：A data taking-in position is adjusted.
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4. Read back &hAA[7] address data and check read result is 0.
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5. Please cancel a DAC mute.
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2012.03 - Rev.A