BD9406KS2 Datasheet, PDF (12/38 Pages) Rohm – 28bit Audio DSP with Built-in 2ch ADC, 6ch DAC and ASRC

BU9406KS2
Technical Note
2-8. Clock Output Selection to AMCLKOB Pin (SEL7)
Default = 0
Select Address
&h06 [ 2：0 ]
Value
0
1
2
3
4
5
Operation Description
Outputs Hi-z
Outputs 256fs (12.288MHz) clock used in DSP
Outputs clock from AMCLK_IN1
Outputs clock from AMCLK_IN2
Outputs clock from AMCLK_IN3
Outputs clock from AMCLK_IN4
2-9. Clock Output Selection to AMCLKOC Pin (SEL8)
Default = 0
Select Address
&h07 [ 5：4 ]
Value
0
1
2
Operation Description
Outputs 256fs (12.288MHz) clock used in DSP
Outputs 256fs clock extracted by S-P conversion 1 PLL1
Outputs 256fs clock extracted by S-P conversion 2 PLL2
2-10. Output Selection to DATAOA Pin (SEL6, SEL9)
Default = 0
Select Address
Value
Operation Description
&h08 [ 6：4 ]
0
Outputs data from I2S_IN1
1
Outputs data from I2S_IN2
2
Outputs data from I2S_IN3
3
Outputs data from I2S_IN4
4
Outputs data from P-S conversion 1 (refer to &h09[7])
P-S conversion 1 converts 24bit parallel data to I²C format serial data.
2-11. Output Selection to DATAOB Pin (SEL6, SEL9)
Default = 0
Select Address
&h08 [ 2：0 ]
Value
0
1
2
3
4
Operation Description
Outputs data from I2S_IN1
Outputs data from I2S_IN2
Outputs data from I2S_IN3
Outputs data from I2S_IN4
Outputs data from P-S conversion 1 (refer to &h09[7])
2-12. Output Selection to DATAOC Pin (SEL2)
Default = 0
Select Address
&h09 [ 4 ]
Value
0
1
Operation Description
Inputs data before DSP processing
Outputs data after DSP processing
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2012.03 - Rev.A