BD9406KS2 Datasheet, PDF (11/38 Pages) Rohm – 28bit Audio DSP with Built-in 2ch ADC, 6ch DAC and ASRC

BU9406KS2
Technical Note
2-3. DF2 Input Selection (SEL1, SEL2, SEL4)
Default = 0
Select Address
&h04 [ 6：4 ]
Value
0
1
2
3
4
Operation Description
Inputs analog signals converted to digital data
Inputs via S-P conversion 1 (refer to &h05[5:4])
Inputs via S-P conversion 2 (refer to &h05[1:0])
Inputs data before DSP processing
Inputs data after DSP processing
2-4. DF3 Input Selection (SEL1, SEL2, SEL5)
Default = 0
Select Address
&h04 [ 2：0 ]
Value
0
1
2
3
4
Operation Description
Inputs analog signals converted to digital data
Inputs via S-P conversion 1 (refer to &h05[5:4])
Inputs via S-P conversion 2 (refer to &h05[1:0])
Inputs data before DSP processing
Inputs data after DSP processing
2-5. S-P Conversion 1 Input Selection (SEL6）
Default = 0
Select Address
&h05 [ 5：4 ]
Value
0
1
2
3
Operation Description
Inputs data from I2S_IN1
Inputs data from I2S_IN2
Inputs data from I2S_IN3
Inputs data from I2S_IN4
2-6. S-P Conversion 2 Input Selection (SEL6)
Default = 0
Select Address
&h05 [ 1：0 ]
Value
0
1
2
3
Operation Description
Inputs data from I2S_IN1
Inputs data from I2S_IN2
Inputs data from I2S_IN3
Inputs data from I2S_IN4
2-7. Clock Output Selection (SEL&) to AMCLKOA Pin
Default = 0
Select Address
&h06 [ 6：4 ]
Value
0
1
2
3
4
5
Outputs Hi-z
Operation Description
Outputs 256fs (12.288MHz) clock used in DSP
Outputs clock from AMCLK_IN1
Outputs clock from AMCLK_IN2
Outputs clock from AMCLK_IN3
Outputs clock from AMCLK_IN4
www.rohm.com
© 2012 ROHM Co., Ltd. All rights reserved.
11/34
2012.03 - Rev.A