RXC101 Datasheet, PDF (19/33 Pages) RF Monolithics, Inc – Multi-channel High data rate Programmable

Receiver Control Register [POR=C0C1h]
Bit Bit Bit Bit Bit Bit Bit Bit
15 14 13 12 11 10 9 8
11000000
Bit
7
VDI1
Bit
6
VDI0
Bit
5
GAIN1
Bit
4
GAIN0
Bit
3
RSSI2
Bit
2
RSSI1
Bit
1
RSSI0
Bit
0
RXEN
The Receiver Control Register configures the following:
• Receiver LNA gain
• Digital RSSI threshold
• Receive baseband bandwidth
• Valid Data Indicator response time
• Function of pin 16
Bit [15..8] – Command Code: These bits are the command code that is sent serially to the processor that
identifies the bits to be written to the Receiver Control Register.
Bit [7..6] – Pin 16 Func: Selects the function of Pin 16. See Table 7 below.
Table 7.
Pin 16 Function
Digital RSSI Out
DQD Out
Clock Recovery Lock
Valid Data Output
VDI1
0
0
1
1
VDI0
0
1
0
1
Bit [5..4] – Receiver LNA Gain: These bits set the receiver LNA gain, which can be changed to
accommodate environments with high interferers. The LNA gain also affects the true RSSI value.
Refer to Bit [2..0] for RSSI. See Table 8 below for gain configuration.
Table 8.
LNA GAIN (dB)
0
-14
-6
-20
GAIN1
0
0
1
1
GAIN0
0
1
0
1
Bit [3..1] – Digital RSSI Threshold: The digital receive signal strength indicator threshold may be set to
indicate that the incoming signal strength is above a preset limit. The result is stored in bit 7 of
the status register. There are eight (8) predefined thresholds that can be set. See Table 9 below
for settings.
RSSI Thresh
-103
-97
-91
-85
-79
-73
-67
-61
Table 9.
RSSI2 RSSI1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
RSSI0
0
1
0
1
0
1
0
1
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