RXC101 Datasheet, PDF(14/33 Page) RF Monolithics, Inc – Multi-channel High data rate Programmable

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RXC101 Datasheet, PDF (14/33 Pages) RF Monolithics, Inc – Multi-channel High data rate Programmable

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The analog RSSI is available through and external pin (15). This pin requires an external capacitor which

sets the settling time. The analog RSSI may be used to recover ASK modulated data at a low rate on the

order of a few thousand bits per sec. The external capacitor value will control the received ASK data rate

allowed so choosing a lower value capacitor enables recovery of faster data at the expense of amplitude.

Using pin (15) with a sensitive comparator will yield good results.

Automatic Frequency Adjustment (AFA)

The PLL has the capability to do fine adjustment of the carrier frequency automatically. In this way, the

receiver can minimize the offset between the transmit and receive frequency. This function may be

enabled or disabled through the Automatic Frequency Adjustment Register. The range of offset can be

programmed as well as the offset value calculated and added to the frequency control word within the

PLL to incrementally change the carrier frequency. The chip can be programmed to automatically

perform an adjustment or may be manually activated by a strobe signal. This function has the advantage

of allowing:

â¢ Cheaper, lower accuracy crystals to be used

â¢ Increased receiver sensitivity by narrowing the receive bandwidth

â¢ Achieving higher data rates

Crystal Oscillator

The RXC101 incorporates an internal crystal oscillator circuit that provides a 10MHz reference, as well as

internal load capacitors. This significantly reduces the component count required. The internal load

capacitance is programmable from 8.5pF to 16pF in 0.5pF steps. This has the advantage of accepting a

wide range of crystals from many different manufacturers having different load capacitance requirements.

Being able to vary the load capacitance also helps with fine tuning the final carrier frequency since the

crystal is the PLL reference for the carrier. When the shunt capacitance, Co, is worst case 7pF and the

ESR is 300 Ohms max, the oscillator can be expected to meet the start-up times as defined in the AC

Characteristics. Crystals with less than 7pF shunt capacitance and lower ESR guarantee much faster

start-up times.

An external clock signal is also provided that may be used to run an external processor. This also has

the advantage of reducing component count by eliminating an additional crystal for the host processor.

The clock frequency is also programmable from eight pre-defined frequencies, each a pre-scaled value of

the 10MHz crystal reference. These values are programmable through the Battery Detect Threshold and

Clock Output Register. The internal clock oscillator may be disabled which also disables the output clock

signal to the host processor. When the oscillator is disabled, the chip provides an additional 196 clock

cycles before releasing the output, which may be used by the host processor to setup any functions

before going to sleep.

Frequency Control (PLL) and Frequency Synthesizer

The PLL synthesizer is the heart of the operating frequency. It is programmable and completely

integrated, providing all functions required to generate the carriers and tunability for each band. The PLL

requires only a single 10MHz crystal reference source. RF stability is controlled by choosing a crystal

with the particular specifications to satisfy the application. This gives the designer the maximum flexibility

in performance.

The PLL is able to perform manual and automatic calibration to compensate for changes in temperature

or operating voltage. When changing band frequencies, re-calibration must be performed. This can be

done by disabling the synthesizer and re-enabling again through the Power Management Register.