S124 Datasheet, PDF (88/98 Pages) Renesas Technology Corp – 32-bit ARM Cortex-M0+ microcontroller

S124
2.12.3
Serial Wire Debug (SWD)
2. Electrical Characteristics
Table 2.62 SWD characteristics (1)
Conditions: VCC = AVCC0 = 2.4 to 5.5 V
Item
Symbol
Min
Typ
SWCLK clock cycle time
t_SWCKcyc
80
-
SWCLK clock high pulse width
t_SWCKH
35
-
SWCLK clock low pulse width
t_SWCKL
35
-
SWCLK clock rise time
t_SWCKr
-
-
SWCLK clock fall time
t_SWCKf
-
-
SWDIO setup time
t_SWDS
16
-
SWDIO hold time
t_SWDH
16
-
SWDIO data delay time
t_SWDD
2
-
Max
Unit
Test conditions
-
ns
Figure 2.63
-
ns
-
ns
5
ns
5
ns
-
ns
Figure 2.64
-
ns
70
ns
Table 2.63 SWD characteristics (2)
Conditions: VCC = AVCC0 = 1.6 to 2.4 V
Item
Symbol
Min
Typ
SWCLK clock cycle time
t_SWCKcyc
250
-
SWCLK clock high pulse width
t_SWCKH
120
-
SWCLK clock low pulse width
t_SWCKL
120
-
SWCLK clock rise time
t_SWCKr
-
-
SWCLK clock fall time
t_SWCKf
-
-
SWDIO setup time
t_SWDS
50
-
SWDIO hold time
t_SWDH
50
-
SWDIO data delay time
t_SWDD
2
-
Max
Unit
Test conditions
-
ns
Figure 2.63
-
ns
-
ns
5
ns
5
ns
-
ns
Figure 2.64
-
ns
150
ns
SWCLK
Figure 2.63 SWD SWCLK timing
t_SWCKcyc
t_SWCKH
t_SWCKf
t_SWCKL
t_SWCKr
R01DS0264EU0100 Rev.1.00
Feb 23, 2016
Page 88 of 95