S124 Datasheet, PDF (50/98 Pages) Renesas Technology Corp – 32-bit ARM Cortex-M0+ microcontroller

S124
AGTIO, AGTEE
(input)
2. Electrical Characteristics
t_ACKWL
t_ACYC
t_ACKWH
AGTIO, AGTO,
AGTOA, AGTOB
(output)
Figure 2.31 AGT I/O timing
t_ACYC2
ADTRG0
Figure 2.32 ADC14 trigger input timing
t_TRGW
KR00 to KR07
t_KR
Figure 2.33 Key interrupt input timing
2.3.7
CAC Timing
Table 2.31 CAC timing
Item
CAC
CACREF input pulse width
t_PBcyc ≤ tcac*²
t_PBcyc > tcac*²
Note 1. t_PBcyc: PCLKB cycle.
Note 2. t_cac: CAC count clock source cycle.
Symbol Min
Typ
t_CACREF
4.5 × t_cac + 3 × t_PBcyc -
5 × t_cac + 6.5 × t_PBcyc -
Test
Max Unit conditions
-
ns
-
-
ns
R01DS0264EU0100 Rev.1.00
Feb 23, 2016
Page 50 of 95