S124 Datasheet, PDF (70/98 Pages) Renesas Technology Corp – 32-bit ARM Cortex-M0+ microcontroller

S124
2. Electrical Characteristics
Table 2.40 A/D conversion characteristics (1) in high-speed mode (2/2)
Conditions: VCC = AVCC0 = 4.5 to 5.5 V, VREFH0 = 4.5 to 5.5 V, VSS = AVSS0 = VREFL0 = 0V
Reference voltage range applied to the VREFH0 and VREFL0.
Item
Min
Typ
Max
Unit
Test Conditions
Offset error
-
±2.0
±18
LSB
High-precision channel
±24.0
LSB
Other than above
Full-scale error
-
±3.0
±18
LSB
High-precision channel
±24.0
LSB
Other than above
Quantization error
-
±0.5
-
LSB
-
Absolute accuracy
-
±5.0
±20
LSB
High-precision channel
±32.0
LSB
Other than above
DNL differential nonlinearity error
-
±4.0
-
LSB
-
INL integral nonlinearity error
-
±4.0
±12.0
LSB
-
Note: The characteristics apply when no pin functions other than 14-bit A/D converter input are used. Absolute
accuracy does not include quantization errors. Offset error, full-scale error, DNL differential nonlinearity error,
and INL integral nonlinearity error do not include quantization errors.
Note 1. The conversion time is the sum of the sampling time and the comparison time. The number of sampling states is
indicated for the test conditions.
Table 2.41 A/D conversion characteristics (2) in high-speed mode (1/2)
Conditions: VCC = AVCC0 = 2.7 to 5.5 V, VREFH0 = 2.7 to 5.5 V, VSS = AVSS0 = VREFL0 = 0V
Reference voltage range applied to the VREFH0 and VREFL0.
Item
Min
Typ
Max
Unit
Frequency
1
-
48
MHz
Analog input capacitance
Cs
-
-
15
pF
-
-
30
pF
Analog input resistance
Rs
-
-
2.5
kΩ
Analog input voltage range
Ain
0
-
VREFH0 V
12-bit mode
Resolution
-
-
12
Bit
Conversion time*¹
Permissible signal
0.94
-
-
μs
(Operation at
source impedance
PCLKD = 48 MHz)
Max. = 0.3 kΩ
1.50
-
-
μs
Offset error
-
±0.5
±4.5
LSB
±6.0
LSB
Full-scale error
-
±0.75
±4.5
LSB
±6.0
LSB
Quantization error
-
±0.5
-
LSB
Absolute accuracy
-
±1.25
±5.0
LSB
±8.0
LSB
DNL differential nonlinearity error
-
±1.0
-
LSB
INL integral nonlinearity error
-
±1.0
±3.0
LSB
14-bit mode
Resolution
-
-
14
Bit
Conversion time*¹
Permissible signal
1.06
-
-
μs
(Operation at
source impedance
PCLKD = 48 MHz)
Max. = 0.3 kΩ
1.63
-
-
μs
Test Conditions
-
High-precision channel
Normal-precision channel
-
-
-
High-precision channel
ADCSR.ADHSC = 0
ADSSTRn.SST[7:0] = 0Dh
Normal-precision channel
ADCSR.ADHSC = 0
ADSSTRn.SST[7:0] = 28h
High-precision channel
Other than above
High-precision channel
Other than above
-
High-precision channel
Other than above
-
-
-
High-precision channel
ADCSR.ADHSC = 0
ADSSTRn.SST[7:0] = 0Dh
Normal-precision channel
ADCSR.ADHSC = 0
ADSSTRn.SST[7:0] = 28h
R01DS0264EU0100 Rev.1.00
Feb 23, 2016
Page 70 of 95