HD6413258F10V Datasheet, PDF (82/301 Pages) Renesas Technology Corp – Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp.

SP-4
SP-3
SP-2
SP-1
SP(R7)
Stack area
SP(R7)
SP+1
SP+2
SP+3
SP+4
CCR
CCR *
PC (upper byte)
PC (lower byte)
Even address
Before interrupt
is accepted
Pushed onto stack
PC : Program counter
CCR : Condition code register
SP : Stack pointer
After interrupt
is accepted
* : Ignored on return.
Notes: 1. The PC contains the address of the first instruction
executed after return.
2. Registers must be saved and restored by word
access at an even address.
Figure 4-5. Usage of Stack in Interrupt Handling
Figure. 4-5
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