HD6413258F10V Datasheet, PDF (181/301 Pages) Renesas Technology Corp – Regarding the change of names mentioned in the document, such as Hitachi Electric and Hitachi XX, to Renesas Technology Corp.

Bit 4 – Parity Mode (O/E ): In asynchronous mode, when parity is enabled (PE = 1), this bit
selects even or odd parity.
Even parity means that a parity bit is added to the data bits for each character to make the total
number of 1’s even. Odd parity means that the total number of 1’s is made odd.
This bit is ignored when PE = 0, and in the synchronous mode.
Bit 4
O/E Description
0 Even parity.
1 Odd parity.
(Initial value)
Bit 3 – Stop Bit Length (STOP): This bit selects the number of stop bits. It is ignored in the
synchronous mode.
Bit 3
STOP
0
1
Description
1 Stop bit.
2 Stop bits.
(Initial value)
Bit 2 – Reserved: This bit cannot be modified and is always read as 1.
Bits 1 and 0 – Clock Select 1 and 0 (CKS1 and CKS0): These bits select the internal clock
source when the baud rate generator is clocked internally.
Bit 1
CKS1
0
0
1
1
Bit 0
CKS0
0
1
0
1
Description
Ø clock
Ø/4 clock
Ø/16 clock
Ø/64 clock
(Initial value)
For further information about SMR settings, see tables 9-5 to 9-7 in Section 9.3, Operation.
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