SH7137_09 Datasheet, PDF (8/24 Pages) Renesas Technology Corp – Output of Complementary Pairs of PWM Signals in Three Phases

SH7280 Group
MTU2: Output of Complementary Pairs of PWM Signals in Three Phases
(Complementary PWM Mode)
2.2.2 Description of Operation by the Sample Program
1. Operation of Timer Counters
Figure 5 shows the operation of two timer counters in complementary PWM mode. Counters TCNT_3 and TCNT_4
of channels 3 and 4 count up and then down. The initial setting of the TCNT_3 counter is the same as the value set
in the TDDR. The initial setting of the TCNT_4 counter is H'0000. Timer counting starts simultaneously on
channels 3 and 4.
TCNT_3 and TCNT_4 Switched to down-counting
on a compare match with TGRA_3.
TGRA_3
TCDR
TCNT_3
Switched to down-counting
on a compare match with TCDR.
TDDR
H'0000
TCNT_4
Counting starts.
Switched to up-counting
on a compare match with H'0000.
Switched to up-counting
on a compare match with TDDR.
Figure 5 Operation of Timer Counters
2. PWM Waveform Output
The output of complementary PWM waveforms in three phases is controlled by timer counters (TCNT_3, TCNT_4)
and comparison registers (TGRB_3, TGRA_4, TGRB_4). The counters for PWM output are constantly compared
with the comparison registers (TGRB_3, TGRA_4, and TGRB_4). When the counter values match the values of
these registers, the output levels of the positive and inverse PWM signals are switched according to the values of
bits OLSN and OLSP in the timer output control register (TOCR).
Figure 6 shows the output signals (the positive and inverse phases) for a single complementary pair. The output
signal of the positive and inverse phases is controlled by timer counters (TCNT_3, TCNT_4) and compare match
registers.
TCNT_3 and TCNT_4
TGRA_3
TCDR
TCNT_3
TGRB_3
TCNTS
TCNT_4
: TGRB_3 (comparison register)
Value is changed for the timing of
PWM output 1 and PWM output 1'.
: Compare match with TGRB_3
TDDR
H'0000
TIOC3B pin
1
(PWM output 1, positive)
0
TIOC3D pin
1
(PWM output 1', inverse)
0
Short-cut circuit
prevention interval
Short-cut circuit
prevention interval
Output of the inverse signal is switched
to 1 when counting up by TCNT_3
leads to a match with TGRB_3.
Output of the positive signal is switched
to 0 when counting up by TCNT_4
leads to a match with TGRB_3.
Output of the inverse signal is switched
to 0 when counting down by TCNT_3
leads to a match with TGRB_3.
Output of the positive signal is switched
to 1 when counting down by TCNT_4
leads to a match with TGRB_3.
PWM waveform outputs are active low level
(for both phases of each pair).
: Active level (low)
Figure 6 Output of PWM Waveforms in Complementary PWM Mode
REJ06B0887-0100/Rev.1.00
June 2009
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