SH7137_09 Datasheet, PDF (2/24 Pages) Renesas Technology Corp – Output of Complementary Pairs of PWM Signals in Three Phases

SH7280 Group
MTU2: Output of Complementary Pairs of PWM Signals in Three Phases
(Complementary PWM Mode)
1. Preface
1.1 Specifications
The sample program employs MTU2 in complementary PWM mode for the three-phase output of complementary
PWM waveforms. Figure 1 shows an overview.
1. Channels 3 and 4 of MTU2 are used to make settings for complementary PWM mode (complementary PWM mode
3). The output pins for the positive PWM signals are TIOC3B, TIOC4A, and TIOC4B. The corresponding inverse
signals are output on pins TIOC3D, TIOC4C, and TIOC4D. The low level is selected as active for PWM output.
2. For both the positive and inverse signals, MTU2 outputs PWM waveforms with a dead time (interval for preventing
short-circuits) in which the state transitions of the positive and inverse signals do not overlap. The duration of the
dead time is set to 4 μs.
3. PWM carrier cycle is set to 400 μs.
4. The PWM duty cycle is incremented or decremented by an interrupt signal generated every PWM cycle.
5. Waveforms are output by toggling the level on the TIOC3A pin in synchronization with half cycles of the PWM
carrier.
SH7137
SH-2A
Interrupt request
PWM cycle setting
PWM duty setting (× 3)
Dead time setting
MTU2
Channels 3 and 4
Complementary
PWM mode 3
TIOC3A(PE8)
TIOC3B (PE9)
TIOC3D (PE11)
TIOC4A (PE12)
TIOC4C (PE14)
TIOC4B (PE13)
TIOC4D (PE15)
Output toggled (synchronized with PWM cycle)
PWM output pin 1 (positive phase)
PWM output pin 1' (inverse phase)
PWM output pin 2 (positive phase)
PWM output pin 2' (inverse phase)
PWM output pin 3 (positive phase)
PWM output pin 3' (inverse phase)
Figure 1 Three-Phase Output of Complementary PWM (Complementary PWM Mode 3)
1.2 Module Used
Channels 3 and 4 of MTU2
1.3 Applicable Conditions
Table 1 Applicable Conditions
Item
MCU
Operating frequency
MCU operating mode
Compiler
C compiler options
Description
SH7137 [R5F7137]
Internal clock:
Iφ = 80 MHz
Bus clock:
Bφ = 40 MHz
Peripheral clock: Pφ = 40 MHz
MTU2S clock:
MPφ = 40 MHz
AD clock:
MIφ = 80 MHz
Single-chip
SuperH RISC engine C/C++ Compiler Ver.9.02.00 from Renesas Technology
Default settings of the C compiler
REJ06B0887-0100/Rev.1.00
June 2009
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