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4502 Datasheet, PDF (78/116 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER | |||
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4502 Group
MACHINE INSTRUCTIONS (INDEX BY ALPHABET) (continued)
TABE (Transfer data to Accumulator and register B from register E)
Instruction
code
D9
D0
Number of
0000101010
02A
2
16
words
1
Number of
cycles
1
Flag CY
â
Skip condition
â
Operation:
(B) â (E7âE4)
(A) â (E3âE0)
Grouping: Register to register transfer
Description: Transfers the high-order 4 bits (E7âE4) of
register E to register B, and low-order 4 bits
of register E to register A.
TABP p (Transfer data to Accumulator and register B from Program memory in page p)
Instruction
code
D9
D0
Number of Number of Flag CY
0
0
1
0
0
p4 p3 p2 p1 p0 0
2
8
+p
p
16
words
1
cycles
3
â
Skip condition
â
Operation:
(SP) â (SP) + 1
(SK(SP)) â (PC)
(PCH) â p
(PCL) â (DR2âDR0, A3âA0)
(B) â (ROM(PC))7â4
(A) â (ROM(PC))3â0
(PC) â (SK(SP))
(SP) â (SP) â 1
Grouping: Arithmetic operation
Description: Transfers bits 7 to 4 to register B and bits 3 to
0 to register A. These bits 7 to 0 are the ROM
pattern in ad-dress (DR2 DR1 DR0 A3 A2 A1
A0)2 specified by registers A and D in page p.
Note:
p is 0 to 15 for M34502M2, and p is 0 to 31
for M34502M4/E4.
When this instruction is executed, be careful
not to over the stack because 1 stage of
stack register is used.
TAD (Transfer data to Accumulator from register D)
Instruction
code
D9
D0
Number of Number of Flag CY
0001010001
051
words
cycles
2
16
1
1
â
Skip condition
â
Operation:
(A2âA0) â (DR2âDR0)
(A3) â 0
Grouping: Register to register transfer
Description: Transfers the contents of register D to the
low-order 3 bits (A2âA0) of register A.
Note:
When this instruction is executed, â0â is
stored to the bit 3 (A3) of register A.
TADAB (Transfer data to register AD from Accumulator from register B)
Instruction
code
D9
D0
Number of
1000111001
239
2
16
words
1
Number of
cycles
1
Flag CY
â
Skip condition
â
Operation:
(AD7âAD4) â (B)
(AD3âAD0) â (A)
Grouping: A/D conversion operation
Description: In the A/D conversion mode (Q13 = 0), this in-
struction is equivalent to the NOP instruction.
In the comparator mode (Q13 = 1), trans-
fers the contents of register B to the
high-order 4 bits (AD7âAD4) of comparator
register, and the contents of register A to
the low-order 4 bits (AD3âAD0) of compara-
tor register.
(Q13 = bit 3 of A/D control register Q1)
Rev.3.01 2005.02.02 page 78 of 112
REJ03B0105-0301
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