4502 Datasheet, PDF (27/116 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4502 Group
(3) Timer 1 (interrupt function)
Timer 1 is an 8-bit binary down counter with the timer 1 reload reg-
ister (R1). Data can be set simultaneously in timer 1 and the reload
register (R1) with the T1AB instruction. Stop counting and then ex-
ecute the T1AB instruction to set data to timer 1. Data can be
written to reload register (R1) with the TR1AB instruction.
When writing data to reload register R1 with the TR1AB instruction,
the downcount after the underflow is started from the setting value
of reload register R1.
Timer 1 starts counting after the following process;
➀ set data in timer 1, and
➁ set the bit 1 of register W1 to “1.”
However, INT pin input can be used as the start trigger for timer 1
count operation by setting the bit 0 of register W1 to “1.”
Also, in this time, the auto-stop function by timer 1 underflow can
be performed by setting the bit 2 of register W2 to “1.”
When a value set is n, timer 1 divides the count source signal by n
+ 1 (n = 0 to 255).
Once count is started, when timer 1 underflows (the next count
pulse is input after the contents of timer 1 becomes “0”), the timer
1 interrupt request flag (T1F) is set to “1,” new data is loaded from
reload register R1, and count continues (auto-reload function).
Data can be read from timer 1 with the TAB1 instruction. When
reading the data, stop the counter and then execute the TAB1 in-
struction.
(4) Timer 2 (interrupt function)
Timer 2 is an 8-bit binary down counter with the timer 2 reload reg-
ister (R2). Data can be set simultaneously in timer 2 and the reload
register (R2) with the T2AB instruction. Stop counting and then ex-
ecute the T2AB instruction to set data to timer 2.
Timer 2 starts counting after the following process;
➀ set data in timer 2,
➁ select the count source with the bits 0 and 1 of register W2, and
➂ set the bit 3 of register W2 to “1.”
When a value set is n, timer 2 divides the count source signal by n
+ 1 (n = 0 to 255).
Once count is started, when timer 2 underflows (the next count
pulse is input after the contents of timer 2 becomes “0”), the timer
2 interrupt request flag (T2F) is set to “1,” new data is loaded from
reload register R2, and count continues (auto-reload function).
Data can be read from timer 2 with the TAB2 instruction. When
reading the data, stop the counter and then execute the TAB2 in-
struction.
(5) Timer interrupt request flags (T1F, T2F)
Each timer interrupt request flag is set to “1” when each timer
underflows. The state of these flags can be examined with the skip
instructions (SNZT1, SNZT2).
Use the interrupt control register V1 to select an interrupt or a skip
instruction.
An interrupt request flag is cleared to “0” when an interrupt occurs
or when the next instruction is skipped with a skip instruction.
(6) Count start synchronization circuit (timer 1)
Timer 1 has the count start synchronous circuit which synchronizes
the input of INT pin, and can start the timer count operation.
Timer 1 count start synchronous circuit function is selected by set-
ting the bit 0 of register W1 to “1.” The control by INT pin input can
be performed by setting the bit 0 of register I1 to “1.”
The count start synchronous circuit is set by level change (“H”→“L”
or “L”→“H”) of INT pin input. This valid waveform is selected by bits
1 (I11) and 2 (I12) of register I1 as follows;
• I11 = “0”: Synchronized with one-sided edge (falling or rising)
• I11 = “1”: Synchronized with both edges (both falling and rising)
When register I11=“0” (synchronized with the one-sided edge), the ris-
ing or falling waveform can be selected by the bit 2 of register I1;
• I12 = “0”: Falling waveform
• I12 = “1”: Rising waveform
When timer 1 count start synchronous circuit is used, the count
start synchronous circuit is set, the count source is input to each
timer by inputting valid waveform to INT pin. Once set, the count
start synchronous circuit is cleared by clearing the bit I10 to “0” or
reset.
However, when the count auto-stop circuit is selected (register W22
= “1”), the count start synchronous circuit is cleared (auto-stop) at
the timer 1 underflow.
(7) Count auto-stop circuit (timer 1)
Timer 1 has the count auto-stop circuit which is used to stop timer
1 automatically by the timer 1 underflow when the count start syn-
chronous circuit is used.
The count auto-stop cicuit is valid by setting the bit 2 of register W2
to “1”. It is cleared by the timer 1 underflow and the count source to
timer 1 is stopped.
This function is valid only when the timer 1 count start synchronous
circuit is selected.
Rev.3.01 2005.02.02 page 27 of 112
REJ03B0105-0301