4502 Datasheet, PDF (30/116 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4502 Group
When the watchdog timer is used, clear the WDF1 flag at the pe-
riod of 65534 machine cycles or less with the WRST instruction.
When the watchdog timer is not used, execute the DWDT instruc-
tion and the WRST instruction continuously (refer to Figure 26).
The watchdog timer is not stopped with only the DWDT instruction.
The contents of WDF1 flag and timer WDT are initialized at the
RAM back-up mode.
When using the watchdog timer and the RAM back-up mode, ini-
tialize the WDF1 flag with the WRST instruction just before the
microcomputer enters the RAM back-up state (refer to Figure 27)
The watchdog timer function is valid after system is returned from
the RAM back-up. When not using the watchdog timer function, ex-
ecute the DWDT instruction and the WRST instruction continuously
every system is returned from the RAM back-up, and stop the
watchdog timer function.
WRST
; WDF1 flag cleared
DI
DWDT
WRST
; Watchdog timer function enabled/disabled
; WEF and WDF1 flags cleared
Fig. 26 Program example to start/stop watchdog timer
WRST
; WDF1 flag cleared
NOP
DI
; Interrupt disabled
EPOF
; POF instruction enabled
POF
↓
Oscillation stop (RAM back-up mode)
Fig. 27 Program example to enter the RAM back-up mode
when using the watchdog timer
Rev.3.01 2005.02.02 page 30 of 112
REJ03B0105-0301