4502 Datasheet, PDF (109/116 Pages) Renesas Technology Corp – SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

4502 Group
Voltage drop detection circuit characteristics
(Ta = –20 °C to 85 °C, unless otherwise noted)
Symbol
Parameter
Test conditions
Limits
Unit
Min.
Typ.
Max.
VRST
Detection voltage (Note 1)
Ta = 25 °C
2.7
4.2
V
3.3
3.5
3.7
Operation current of voltage RAM back-up mode
VDD = 5.0 V
IRST
drop detection circuit
(POF instruction execution) (Note 2)
50
100
µA
Notes 1: The detected voltage (VRST) is defined as the voltage when reset occurs while the supply voltage (VDD) is falling.
2: The voltage drop detection circuit is operating in the RAM back-up with the POF instruction (It stops in the RAM back-up with the POF2 instruction).
Basic timing diagram
Parameter
Clock
Machine cycle
Mi
Pin name
XIN : high-speed mode
(System clock = f(XIN))
XIN : middle-speed mode
(System clock = f(XIN)/2)
XIN : low-speed mode
(System clock = f(XIN)/4)
XIN : default mode
(System clock = f(XIN)/8)
Port D output
Port D input
Port P0, P1, P2, P3
output
D0, D1, D2/C, D3/K,
D4, D5
D0, D1, D2/C, D3/K,
D4, D5
P00–P03
P10–P13
P20, P21
P30, P31
Port P0, P1, P2, P3
input
P00–P03
P10–P13
P20, P21
P30, P31
Timer output
CNTR
Timer input
CNTR
Mi+1
Interrupt input
INT
Rev.3.01 2005.02.02 page 109 of 112
REJ03B0105-0301