M66591GP Datasheet, PDF (77/133 Pages) Renesas Technology Corp – ASSP (USB2.0 Peripheral Controller)

M66591GP
3.2.3 USB Attach Process
AfterM66591 detects attach to the host, the USB attach processing is executed.
The basic details of the USB attach processing are as follows:
(1) Select M66591 operation mode:
M66591 can select enable/disable of the Hi-Speed operation mode by the HSE bit of the USB Transceiver
Control Register 0.
(2) Enable M66591 clock oscillation:
The sequence consists of enable of the oscillation buffer, enable of the internal reference clock, enable of PLL
operation, and enable of the internal clock. In this series of operations, it is necessary to insert wait required for
oscillation to be stabilized.
(3) D+ line pull-up:
Connection (Attach) is notified to the host.
The detailed process flowchart is shown in the following Figure 3.5.
USB attach
processing
Selecting operation mode
HSE bit setting
Set M66591 operation mode.
HSE="1": Enable Hi-Speed operation.
HSE="0": Disable Hi-Speed operation.
(Full-Speed operation)
XCKE = "1"?
Yes
No
Enabling oscillation
buffer
(XCKE='1')
Waiting
oscillation stable
Enabling RCLK
operation
(RCKE='1')
Enabling PLL
operation
(PLLC='1')
Waiting
oscillation stable
Enabling SCLK
operation
(SCKE='1')
Attach notification
(RpuE='1')
Enable M66591 oscillation buffer.
After enable oscillation, it is necessary to wait for
1.5ms or more until oscillation becomes stable.
However this waiting time is unnessary when use
external clock input.
Enable internal reference clock of M66591.
Enable M66591 PLL operation.
It is necessary to wait for 8.3 µs or more until PLL
operation becomes stable.
Enable M66591 Internal clock supply.
Attach is notified to the PC.
End
Figure 3.5 M66591 USB Attach Process Flowchart
Rev.1.00 Nov. 30, 2004 page 77 of 131