M66591GP Datasheet, PDF (1/133 Pages) Renesas Technology Corp – ASSP (USB2.0 Peripheral Controller)

M66591GP
ASSP (USB2.0 Peripheral Controller)
REJ03F0101-0100Z
Rev.1.00
Nov. 30, 2004
1 Overview
1.1 Overview
The M66591 is a general-purpose USB (Universal Serial Bus) device controller compliant with the Universal Serial
Bus Specification Revision 2.0 and supports both Hi-Speed and Full-Speed transfer.
The USB Hi-Speed and Full-Speed transceiver are built-in, and the M66591 meets control, bulk and interrupt
transfer types which are defined in the Universal Serial Bus Specification Revision 2.0.
The M66591 has a 3.5K byte FIFO and 7 endpoints (maximum) for data transfer.
Further, being equipped with the split bus (DMA interface) which is independent from the CPU bus interface, the
M66591 is suitable for use in systems that require large capacity data transfer at Hi-Speed.
1.2 Features
♦ Universal Serial Bus Specification Revision 2.0 compliant
♦ Built-in USB transceiver
♦ Supports both Hi-Speed (480M bps) and Full-Speed (12M bps)
♦ USB protocol layer by hardware
• Bit stuffing encoding and decoding
• CRC (Cyclic Redundancy Check) generation and checking
• NRZI (Non Return Zero Invert) encoding and decoding
• Packet detection
• USB address checking
♦ Hi-Speed and Full-Speed detection by hardware
♦ Supports the following USB transfer types
• Control transfer (PIPE0)
• Bulk transfer (PIPE1~PIPE4)
• Interrupt transfer (PIPE5~PIPE6)
♦ Built-in FIFO buffer (3.5K bytes) for endpoints
♦ Up to 7 endpoints selectable
♦ Data transfer condition selectable for each PIPE
• Hi-Speed
- PIPE0: Control transfer, continuous transfer mode, 256-byte FIFO
- PIPE1~2: Bulk in or bulk out transfer, 512-byte FIFO, double buffer
- PIPE3~4: Bulk in or bulk out transfer, 512-byte FIFO, single buffer
- PIPE5~6: Interrupt in transfer, 64-byte FIFO, single buffer
• Full-Speed
- PIPE0: Control transfer, continuous transfer mode, 256-byte FIFO
- PIPE1~2: Bulk in or bulk out transfer, continuous transfer mode, 512-byte FIFO, double buffer
- PIPE3~4: Bulk in or bulk out transfer, continuous transfer mode, 512-byte FIFO, single buffer
- PIPE5~6: Interrupt in transfer, 64-byte FIFO, single buffer
♦ Automatic response for Set Address request
♦ Supports the following input frequency
• 12 / 24 / 48MHz
♦ Supports 16-bit CPU I/F and 8/16-bit DMA transfer
♦ Supports separate/multiplex bus
• 16-bit separate/multiplex bus
♦ Supports 8-bit split bus (DMA interface)
♦ USB status output for power management
♦ 1.8V/3.3V interface power supply
♦ Application
• Digital camera, printer, external storage device and all Hi-Speed USB PC peripheral device
Rev.1.00 Nov. 30, 2004 page 1 of 131