M66591GP Datasheet, PDF (50/133 Pages) Renesas Technology Corp – ASSP (USB2.0 Peripheral Controller)

M66591GP
2.26 Interrupt Status Register 2
„ Interrupt Status Register 2 (INTStatus2)
b15 14 13 12 11 10 9 8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
b
15~7
6
Bit name
Reserved. Set it to “0”.
PIPEB_NRDY6
PIPE6 Buffer Not Ready Interrupt
5 PIPEB_NRDY5
PIPE5 Buffer Not Ready Interrupt
4 PIPEB_NRDY4
PIPE4 Buffer Not Ready Interrupt
3 PIPEB_NRDY3
PIPE3 Buffer Not Ready Interrupt
2 PIPEB_NRDY2
PIPE2 Buffer Not Ready Interrupt
1 PIPEB_NRDY1
PIPE1 Buffer Not Ready Interrupt
0 DCP_NRDY
Default Control PIPE Buffer Not Ready
Interrupt
<Address: H’68>
7
6
5
4
3
2
1
b0
PIPEB_NRDY6 PIPEB_NRDY5 PIPEB_NRDY4 PIPEB_NRDY3 PIPEB_NRDY2 PIPEB_NRDY1 DCP_NRDY
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
-
-
-
-
-
-
-
<H/W reset: H’0000>
<S/W reset: H’0000>
<USB bus reset: ->
Function
RW
• Read
“0” “0”
{{
0: No occurrence of interrupt
1: Occurrence of interrupt
• Write
0: Clear interrupt
1: Invalid (Ignored when written)
• Read
{{
0: No occurrence of interrupt
1: Occurrence of interrupt
• Write
0: Clear interrupt
1: Invalid (Ignored when written)
• Read
{{
0: No occurrence of interrupt
1: Occurrence of interrupt
• Write
0: Clear interrupt
1: Invalid (Ignored when written)
• Read
{{
0: No occurrence of interrupt
1: Occurrence of interrupt
• Write
0: Clear interrupt
1: Invalid (Ignored when written)
• Read
{{
0: No occurrence of interrupt
1: Occurrence of interrupt
• Write
0: Clear interrupt
1: Invalid (Ignored when written)
• Read
{{
0: No occurrence of interrupt
1: Occurrence of interrupt
• Write
0: Clear interrupt
1: Invalid (Ignored when written)
• Read
{{
0: No occurrence of interrupt
1: Occurrence of interrupt
• Write
0: Clear interrupt
1: Invalid (Ignored when written)
Rev.1.00 Nov. 30, 2004 page 50 of 131