M66591GP Datasheet, PDF (68/133 Pages) Renesas Technology Corp – ASSP (USB2.0 Peripheral Controller)

M66591GP
The transmit completes under any one of the following conditions when setting the PIPE to IN:
• Transmits the data equal to 512 bytes
• Transmits the short packet or transmits the zero-length packet
The writing completes under any one of the following conditions when setting the PIPE to IN:
• Writes to the buffer the data equal to 512 bytes
• Writes “1” to the BVAL bit of the C_FIFO Port Control Register 1.
The receive completes under any one of the following conditions when setting the PIPE to OUT:
• Receives the data equal to 512 bytes
• Receives the short packet or transmits the zero-length packet
Before setting this bit, be sure to set the PID [1:0] bits of the PIPE i Control Register (i=1~4) to “00” (NAK).
(6) DIR (Transfer Direction) Bit (b4)
This bit sets the transfer direction of the PIPE. This bit is valid only for PIPE1 to PIPE4. The written to this bit is
ignored for PIPE5 and PIPE6 which concern the IN direction setting.
After switching the transfer direction, clear the buffer by the BCLR bits of the C_FIFO Port Control Register 1 or
the D0_FIFO Port Control Register 2.
Before setting this bit, be sure to set the PID [1:0] bits of the PIPE i Control Register (i=1~4) to “00” (NAK).
(7) EP_NUM [2:0] (Endpoint Number) Bits (b2-b0)
These bits read the endpoint number of the PIPE having been set to the PIPE_SEL [2:0] bits of the PIPE
Configuration Select Register. The endpoint number is fixed, same as PIPE number.
The endpoint number of PIPE1 is 1 (EP1).
The endpoint number of PIPE2 is 2 (EP2).
The endpoint number of PIPE3 is 3 (EP3).
The endpoint number of PIPE4 is 4 (EP4).
The endpoint number of PIPE5 is 5 (EP5).
The endpoint number of PIPE6 is 6 (EP6).
These bits are read only. Any writing is ignored.
Rev.1.00 Nov. 30, 2004 page 68 of 131