M37221M6_03 Datasheet, PDF (51/62 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER

MITSUBISHI MICROCOMPUTERS
M37221M6-XXXSP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
CLOCK GENERATING CIRCUIT
The built-in clock generating circuit is shown in Figure 56. When the
STP instruction is executed, the internal clock φ stops at “H” level. At
the same time, timers 3 and 4 are connected in hardware and “FF16”
is set in the timer 3, “0716” is set in the timer 4. Select f(XIN)/16 as the
timer 3 count source (set bit 0 of the timer 34 mode register to “0”
before the execution of the STP instruction). And besides, set the
timer 3 and timer 4 interrupt enable bits to disabled (“0”) before ex-
ecution of the STP instruction. The oscillator restarts when external
interrupt is accepted, however, the internal clock φ keeps its “H” level
until timer 4 overflows. Because this allows time for oscillation stabi-
lizing when a ceramic resonator or a quartz-crystal oscillator is used.
When the WIT instruction is executed, the internal clock φ stops in
the “H” level but the oscillator continues running. This wait state is
released when an interrupt is accepted (Note). Since the oscillator
does not stop, the next instruction can be executed at once.
When returning from the stop or the wait state, to accept an interrupt,
set the corresponding interrupt enable bit to “1” before executing the
STP or the WIT instructions.
The circuit example using a ceramic resonator (or a quartz-crystal
oscillator) is shown in Figure 54. Use the circuit constants in accor-
dance with the resonator manufacture’s recommended values. The
circuit example with external clock input is shown in Figure 55. Input
the clock to the XIN pin, and open the XOUT pin.
Note: In the wait mode, the following interrupts are invalid.
(1) VSYNC interrupt
(2) CRT interrupt
(3) f(XIN)/4096 interrupt
(4) Timer 1 interrupt using f(XIN)/4096 as count source
(5) Timer 2 interrupt using P24/TIM2 pin input as count source
(6) Timer 3 interrupt using P23/TIM3 pin input as count source
(7) Timer 4 interrupt using f(XIN)/2 as count source
(8) Multi-master I²C-BUS interface interrupt
M37221M6-XXXSP
XIN
19
XOUT
20
CIN
COUT
Fig. 54. Ceramic resonator circuit example
M37221M6-XXXSP
XIN
19
Vcc
External oscillation circuit
Vss
Fig. 55. External clock input circuit example
Interrupt request
Interrupt disable
flag I
Reset
SQ
STP instruction
R
SQ
WIT
R
instruction
QS
Reset
R STP
instruction
.
Selection gate :
Connected to black
colored side at reset.
1/2
1/8
XIN
XOUT
T34M : Timer 34 mode register
Fig. 56. Clock generating circuit block diagram
T34M0
T34M2
Timer 3
Internal clock φ
Timer 4
50