7643_06 Datasheet, PDF (179/424 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

7643 Group
APPLICATION
2.4 UART
RESET
q x: This bit is not used here. Set it to “0” or “1” arbitrarily.
Initialization
UBRG (Address : 3116)
UCON (Address : 3316)
UMOD (Address : 3016)
P3D (Address : 0F16), bit1
ICONA (Address : 0516), bit6
ICONB (Address : 0616), bit0
CLI
4D16
100x11102
010x10002
0
1
1
• φ as UART clock, 2 stop bits,
Parity checking disabled, 8-bit character length
• Port P31 to input mode
• UART receive buffer full interrupt enabled
• UART summing error interrupt enabled
UCON (Address : 3316), bit1 12
• Reception starts.
Main process
0
P3 (Address : 0E16), bit1?
1
UCON (Address : 3316)
UCON (Address : 3316)
010x10002
010x10102
• Countermeasure for a bit slippage
UART summing error interrupt routine
CLT (Note 1)
CLD (Note 2)
Push registers to stack
Error process
Pop registers
RTI
Note 1: When using Index X mode flag (T)
Note 2: When using Decimal mode flag (D)
•Push registers used in interrupt process routine
Fig. 2.4.22 Control procedure (1)
Rev.2.00 Aug 28, 2006 page 58 of 202
REJ09B0133-0200