7643_06 Datasheet, PDF (174/424 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER

7643 Group
APPLICATION
2.4 UART
Figure 2.4.18 shows a control procedure of transmitter, and Figure 2.4.19 shows a control procedure
of receiver.
RESET
q x: This bit is not used here. Set it to “0” or “1” arbitrarily.
Initialization
UBRG
UCON
UCON
UMOD
(Address : 3116)
(Address : 3316),
bit7 to bit 1
(Address : 3316), bit0
(Address : 3016)
4D16
001xx102
1
010x10002
• CTS function enabled
• φ as UART clock, 2 stop bits,
Parity checking disabled, 8-bit character length
• UART transmit interrupt disabled
ICONA (Address : 0516), bit7 0
CLI
10 ms pass ?
N
Y
UTRB2 (Add. : 3516)
UTRB1 (Add. : 3416)
The first byte of a
transmission data
0
USTS (Address : 3216), bit1?
1
UTRB2 (Add. : 3516)
UTRB1 (Add. : 3416)
The second byte of
a transmission data
• An interval of 10 ms generated by Timer
• Transmission data write
Transmit buffer empty flag is set to “0” by this writing.
Transmission starts owing to “L” input to CTS pin.
• Judgment of transferring data from Transmit
buffer register to Transmit shift register
(Transmit buffer empty flag)
• Transmission data write
Transmit buffer empty flag is set to “0” by this writing.
0
USTS (Address : 3216), bit1?
1
• Judgment of transferring data from Transmit
buffer register to Transmit shift register
(Transmit buffer empty flag)
0
USTS (Address : 3216), bit0?
1
• Judgment of shift completion of Transmit shift register
(Transmit complete flag)
Fig. 2.4.18 Control procedure of transmitter
Rev.2.00 Aug 28, 2006 page 53 of 202
REJ09B0133-0200