H8S-2633 Datasheet, PDF (177/1487 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Section 4 Exception Handling
Table 4.3 Types of Reset
Type
Power-on reset
Manual reset
Conditions for
Transition to Reset
MRES RES
*
Low
Low
High
CPU
Initialization
Initialization
Internal State
Built-in vicinity module
Initialization
Initialization except for bus controller
and I/O port
*: Don't Care
4.2.3 Reset Sequence
This LSI enters reset state when the RES pin or MRES pin goes low.
To ensure that this LSI is reset, hold the RES pin or the MRES pin low for at least 20 ms at power-
up. To reset during operation, hold the RES pin or the MRES pin low for at least 20 states.
When the RES pin or the MRES pin goes high after being held low for the necessary time, this
LSI starts reset exception handling as follows.
1. The internal state of the CPU and the registers of the on-chip supporting modules are
initialized, the T bit is cleared to 0 in EXR, and the I bit is set to 1 in EXR and CCR.
2. The reset exception handling vector address is read and transferred to the PC, and program
execution starts from the address indicated by the PC.
Figures 4.2 and 4.3 show examples of the reset sequence.
Rev. 5.00 Mar 28, 2005 page 115 of 1422
REJ09B0234-0500