H8S-2633 Datasheet, PDF (1398/1487 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer

Appendix C I/O Port Block Diagrams
*2
P35
*1
*3
Reset
R
Q
D
P35DDR
C
WDDR3
Reset
R
Q
D
P35DR
C
WDR3
Reset
R
Q
D
P35ODR
C
WODR3
RODR3
RDR3
SCI module
Serial clock output
enable
Serial clock output
Serial clock input
enable
RPOR3
Serial clock input
IIC0 module
SCL0 output
IIC0 output enable
SCL0 input
Interrupt controller
IRQ5 interrupt input
Legend:
WDDR3: Write to P3DDR
WDR3: Write to P3DR
WODR3: Write to P3ODR
RDR3: Read P3DR
RPOR3: Read port 3
RODR3: Read P3ODR
Notes: 1. Priority order: IIC output > Serial clock output > DR output
2. Output enable signal
3. Open drain control signal
Figure C.2 (f) Port 3 Block Diagram (Pin P35)
Rev. 5.00 Mar 28, 2005 page 1336 of 1422
REJ09B0234-0500